In the RISC OS world, we (should) all know that RISC OS runs on ARM processors in either 26 or 32-bit mode, depending what hardware (or emulator) you are running it on – and that we are now at the stage where 64-bit only ARM processors are becoming the norm, and RISC OS is unable to run on them.
Right from its outset, the ARM was a 32-bit processor with 32-bit registers, one of which was the ‘program counter’, a special register used to determine the address in memory from which to read instructions to be executed. However, it used to be that the processor flags were also stored in that register – these are a number of individual bits in the register that had a special meaning, such as whether a previous operation (for example adding two registers) caused a ‘carry’. And because these bits took up some of the 32-bits of the program counter, that meant the actual width of the address was more limited. This is often referred to as 26-bit mode.
When a full 32-bit mode first appeared, ARM processors were still able to operate in the old way, so at first there was no great effort to update RISC OS, although that did eventually change and all new hardware we see these days on which RISC OS can run features a processor that lacks that 26-bit mode.
For some years now, many ARM processors have sported a 64-bit architecture (aka Aarch64) and a 64-bit instruction set, and like the gradual shift from 26-bit to 32-bit, the path has been one that first saw the 64-bit mode available on the devices alongside the 32-bit one, eventually leading to ARM chips that are 64-bit only, and fewer and fewer with the 32-bit facility.
For RISC OS, this means an increasing number of ARM CPUs on which it can’t be run, and the 64-bit instruction set is sufficiently different to the 32-bit set that changing the operating system would be quite a challenge – and that is very much an understatement.
This has been the subject of debate for some time, and at the next RISC OS User Group of London (ROUGOL) meeting, Gerph will be offering his thoughts on the topic.
He will discuss with the group some of the issues involved, and go through some of the differences between Aarch64 and the older (but current – and currently vital – for us) 32-bit architecture, covering the issues those differences can cause, and how they might be overcome.
Gerph’s talk will take the form of a presentation, but he would like it if there is a little more audience participation from people with suitable knowledge of the subject matter.
The meeting, which will take place on Monday, 19th August, will be a hybrid one with some participants in the group’s regular venue, and others joining online via Zoom.
For those attending in person, the meeting proper will commence at 7:45pm, but there should be ROUGOL members lurking in the venue from around 6:30pm – and that venue is:
The Duke of Sussex,
(upstairs in either the Chichester or Petworth Room),
23 Baylis Road,
London,
SE1 7AY.
The pub is very easy to reach via public transport, and there is parking right outside for anyone coming by car – there are directions available on the ROUGOL website.
For online attendees, the meeting will be open for joining from around 7:30pm. As well as a device on which to run the software, you’ll also need the meeting credentials, and these are unchanged from previous ROUGOL meetings. If you haven’t joined one previously, or can’t find those details, get in touch with ROUGOL to receive them by email.
